VLSI synthesis of DSP kernels : algorithmic and architectural transformations /

VLSI synthesis of DSP kernels : algorithmic and architectural transformations /

Saved in:
Bibliographic Details
Main Author: Mehendale, Mahesh
Other Authors: Sherlekar, Sunil D.
Format: Book
Language:English
Published: Boston : Kluwer Academic Publishers, c2001.
Subjects:
Digital integrated circuits > Mathematical models.
Integrated circuits > Very large scale integration > Mathematical models.
Signal processing > Digital techniques > Mathematics.
Computer architecture.
Computer algorithms.
Transformations (Mathematics)
Online Access:Publisher description
Table of contents only
LEADER 02143cam a2200409 a 4500
001 c000391938
003 CARM
005 20121106105629.0
008 121106s2001 maua b 001 0 eng d
010 |a 2001038210 
019 1 |a 69840350  |5 LACONCORD2021 
020 |a 0792374215 (alk. paper) 
035 |a (OCoLC)47136593  |5 LACONCORD2021 
040 |a DLC  |b eng  |c DLC  |d DLC  |d OrLoB-B 
042 |a pcc 
050 0 0 |a TK7874.65  |b M44 2001 
082 0 0 |a 621.395  |2 21 
100 1 |a Mehendale, Mahesh. 
245 1 0 |a VLSI synthesis of DSP kernels :  |b algorithmic and architectural transformations /  |c by Mahesh Mehendale, Sunil D. Sherlekar. 
260 |a Boston :  |b Kluwer Academic Publishers,  |c c2001. 
300 |a xxiii, 209 p. :  |b ill. ;  |c 25 cm. 
504 |a Includes bibliographical references (p. 199-206) and index. 
505 0 |a 1. Introduction -- 2. Programmable DSP Based Implementation -- 3. Implementation Using Hardware Multiplier(s) and Adder(s) -- 4. Distributed Arithmetic Based Implementation -- 5. Multiplier-Less Implementation -- 6. Implementation of Multiplication-Free Linear Transforms -- 7. Residue Number System Based Implementation -- 8. A Framework for Algorithmic and Architectural Transformations -- 9. Summary. 
650 0 |a Digital integrated circuits  |x Mathematical models. 
650 0 |a Integrated circuits  |x Very large scale integration  |x Mathematical models. 
650 0 |a Signal processing  |x Digital techniques  |x Mathematics. 
650 0 |a Computer architecture. 
650 0 |a Computer algorithms. 
650 0 |a Transformations (Mathematics) 
700 1 |a Sherlekar, Sunil D. 
852 8 |b CARM  |p 0589130  |f BK 
852 8 |b SCAN  |h A3:AG13F0  |i C12822  |p 0589130  |f BK 
856 4 2 |3 Publisher description  |u http://www.loc.gov/catdir/enhancements/fy0820/2001038210-d.html 
856 4 1 |3 Table of contents only  |u http://www.loc.gov/catdir/enhancements/fy0820/2001038210-t.html 
999 f f |i c7706dab-5625-5326-a6c8-bc8768e8a01a  |s ce7f603e-372d-55a8-a5ce-14ca42fefa51 
952 f f |p Can circulate  |a CAVAL  |b CAVAL  |c CAVAL  |d CARM 1 Store  |i book  |m 0589130 
952 f f |a CAVAL  |b CAVAL  |c CAVAL  |d Unmapped Location  |e C12822  |f A3:AG13F0  |h Other scheme 

Similar Items