Switch-level timing simulation of MOS VLSI circuits /

Wedi'i Gadw mewn:
Manylion Llyfryddiaeth
Awduron Eraill: Rao, Vasant B.
Fformat: Llyfr
Iaith:English
Cyhoeddwyd: Boston : Kluwer Academic Publishers, c1989.
Cyfres:Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing
Pynciau:

CARM 1 Store

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Rhif Galw: A2:AO26A0 B06471
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